International Journal of Scientific & Engineering Research, Volume 4, Issue 4, April-2013 243

ISSN 2229-5518

Interfacing of 8 Channel Optical MUX DEMUX in

DWDM System

Chittajit Sarkar

Abstract— Purpose of this paper is to describe the hardware design interfacing of the 8 channel Optical Mux/Demux (OMD) Module in DWDM system. There are two types of OMD modules used in DWDM/CWDM system.Type-1 consists of OMD module with A/D converter and processor.Type-2 consists of OMD module without A/D converter and processor. “Multiplexing” is a term used to describe the mixing or insertion of signals into a stream;

“De‐multiplexing” is used to describe the removal or extraction of the signals.The communications interface between host (processor or FPGA) and OMD mod-

ule is through I2C bus. The A/D converters and the EEPROM, holding module specific data, are controlled via the I2C bus and supplied with power from the

DC/DC converter.

Index Terms— CWDM, DEMUX, DWDM, I2C, MUX

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1 INTRODUCTION

These are passive optical filter systems which are arranged t o process specific wavelengths in and out of the transport str eam. As these are optical devices they can be used for both multiplex-
ing and de‐multiplexing or both. The process of filtering the wave-
lengths can be performed with prisms, but morecommon tec
hnolo-
gies used are thin film filters, dichroic filters or interference f
ilters which are used to selectively reflect a single wavelengt h of light, but pass all others transparently. Each filter is tune d for specific wavelength which is why it’s important to conn ect the correct wavelength to the correspondingI/O port. The Fig.1shows the basic function; in this example it’s a 4 port de vice with eightwavelengths on the main I/O port.Individual I
/O ports will have the specific wavelength specified. COM P

ort means “Common” and this is the primary single fiber I/ O connection which will contain all the multiplexed wavelen gths . This is connected to the COM port on the Optical MUX
/DEMUX unit at the other end of the link.

Fig.1: Block diagram of ODM system

UPG Port means “Upgrade” and this is the “pass band” p ort. To keep system costs down manufacturers offer Optical MUX/DEMUX solutions in smaller configurations which ca n be easily expanded. For example a smaller 4 port or 8 port deice rather than providing a single large 16or 18 port device
. Any wavelengths present in the stream which are not supp ort-

ed by thespecific optical MUX/DEMUX unit are passed on U PG port for connection to the next Optical MUX/DEMUX un it which supports these wavelengths.

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Chittajit Sarkar is currently working as Assistant Professor in Swami Vi- vekananda Institute of Science and Technology and pursuing PhD from department of RadioPhysics and Electronics, Calcutta University.E-mail: chittajit_sarkar@yahoo.co.in

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International Journal of Scientific & Engineering Research, Volume 4, Issue 4, April-2013 244

ISSN 2229-5518

Fig.2: Configuration of DWDM MUX/DEMUX

2 MUX AND DEMUX FUNCTIONALSCHEMATIC

The module contains an 8 channel optical multiplexer and de-multiplexer with monitoring of optical power on all input fibers (Type -2) and analog to digital (A/D) converters. (In case of Type -1). As fig.3, system uses multiplexer at the transmitter to combine the 8 input signals with optical power monitoring at the input. Channel spacing between the two operating wavelength is 20nm.

OPTICAL MODULE

3 DIFFERENT TYPE OF OMD MODULE

3.1 OMD module (Type-1)

Ch1-Ch8 optical Mux input ports with LC/UPC Connector with 50cm optical cables.Ch1-Ch8 optical De-Mux output ports with LC/UPC Connector with 50cm optical ca- bles.Input monitoring tap for monitoring individual channel power channel optical MUX-DEMUX Optical APD diodes. (APD diode leads) Optical Mux Output & Optical Demux Input port with LC/UPC connector with 50cm optical cable. RS232/ I2C Interface is used to communicate with host.

MUX OUTPUT

Ch1

Ch8

MUX

MUX O/P

M OPTICAL

U 8Channel

X MUX DEMUX

MODULE

I N P U

MUXED INPUT

A/D Converter + Processor

RS232 / I2C

Fig.3: MUX functional schematic

As shown in the fig.4, System uses Demultiplexer at the re- ceiver to split the combined signals (8 channels) to different operating wavelengths with channel spacing of 20nm each.

OPTICAL MODULE

Ch1

DEMUX OUTPUT

Fig.5: OMD Type-1

3.2 Optical MUX (Type-2)

Ch1 to Ch8-optical input ports with LC/UPC Connector with
50 cm optical cables. Input monitoring tap for monitoring
individual channel power.8 channel optical MUX. Optical
APD diodes. (APD diode leads). Optical Mux output port
with LC/UPC connector with 50 cm optical cable.

DEMUX

Monitoring TAP

DEMUX I/P

Ch8

A/D Converter + Processor

Fig. 4: DEMUX functional schematic

LC/UPC Connector

Fig. 6: Optical MUX Type-2

LC/UPC Connector

3.3 Optical DEMUX (Type-2)

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International Journal of Scientific & Engineering Research, Volume 4, Issue 4, April-2013 245

ISSN 2229-5518

Optical DEMUX input port with LC/UPC connector with 50 cm optical cable.Input monitoring tap. (APD diode leads).8 channel optical DEMUX.Optical APD diodes. (APD diode leads).Ch1 to Ch8-optical output ports with LC/UPC Con- nector with 50 cm optical cables.

Table.1: Wave length allocation

4.1 Other parameters

LC/UPC Connector

Fig. 7: Optical DEMUX Type-2

3.4 Optical MUX DEMUX integrated module (Type-2)

Ch1-Ch8 optical Mux input ports with LC/UPC Connector with 50cm optical cables.Ch1-Ch8 optical De-Mux output ports with LC/UPC Connector with 50cm optical cables. In- put monitoring tap for monitoring individual channel pow- er.8 channel optical MUX-DEMUX.Optical APD diodes. (APD diode leads).Optical Mux Output & Optical Demux Input port with LC/UPC connector with 50cm optical ca- ble.RS232/ I2C Interface is present to interface host.

APD Termination

Table 2: Other parameters for CDWM

4.2 Monitor, A/D converter performance requirements

OPTICAL

8Channel

MUX DEMUX

MODULE

MUX OUTPUT

MUXED INPUT

Table 3:Monitor,A/D converter performance requirement

5 OMD PERFORMANCE REQUIREMENT FOR TYPY1 AND TYPE2 (DWDM)

5.1 wave length allocation

1 2 3 4 5 6 7 8Ch

DEMUX OUTPUT

RS232/I2C

Fig. 8: OpticalMUX DEMUX integrated module Type-2

4 OMD PERFORMANCE REQUIREMENT FOR TYPY1 AND TYPE2 (CWDM)

4.1 wave length allocation

Table.4: Wave length allocation for DWDM

5.2 Other parameters

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International Journal of Scientific & Engineering Research, Volume 4, Issue 4, April-2013 246

ISSN 2229-5518

SCLK and SDA at Open collector, at LVTTL (3.3V).On the I2C bus,host is master, and OMD module is slave, i.e. all communications transactions are initiated by host (mas- ter),OMD module (slave) only sends data to host on de- mand.I2C Address On the I2C bus, OMD(slave) is identified by a unique I2C address (7 bit, 0 ~ 127).OMD’s I2C slave address is determined in the format of Base Address + Offset
,Let Base Address = 5Ch, or 101 1100 b. Offset = (PosID1
PosID0) b ,For example, if PosID1 = 1, PosID0 = 0, the slave
I2C address is 5Eh = 5Ch + 02h = 5Ch + (10) b .Generically,
the bit stream on SDA line vs. PosID1 (P1) and PosID0 (P0)
is: START 1 0 1 1 1 P1 P0 R/W

Table 5: Other parameters for DWDM

6 HIGER ORDER MUX DEMUX

For 88 channels DWDM system two 44 channels MUX are connected through interleaver to get 88 channels as shown below.The host interfacing will remain same (I2C).

Ch1

Ch3

5 COMMUNICATION INTERFACE

The communications interface between host (processor or
FPGA) and OMD module is through I2C bus. The A/D con-
verters and the EEPROM, holding module specific data, are In
controlled via the I2C bus and supplied with power from the
DC/DC converter.
The I2C bus operates at data rate of 400 kbps with two wires,
odd

1x44

I2C I2C

Ch5

Ch87

SCLK and SDA at Open collector, at LVTTL (3.3V).On the
I2C bus, host is master, and OMD module is slave, i.e. all
communications transactions are initiated by host (master),
OMD module (slave) only sends data to host on demand.
Viewed from host, OMD module works like an I2C
EEPROM, i.e. host can read/write data from/to OMD module
at designated address in the EEPROM.

1x2 Inter leaver

even

1x44

Ch2

Ch4

Ch6

Ch88

Monitor

Signal

I/V and A/D Converter

I2C I2C

Host

(Processor or

Fig.10:88 channel DEMUX Communication Interface

7 CONCLUSION
Depending on interface requirement, the communication between host and OMD module may be through RS232.

EEPROM

Fig. 9: Communication Interface

5.1 EXRENAL INTERFACE SIGNALS

REFERENCES

[1] User manual of “Optical add/drop and MUX/DEMUX” http://www.teleste.com/ProductDocument/ADD_DR OP_MUX_DEMUX_um_2.pdf.
[2] Product sheets of “CWDM MUX/DEMUX 8; C1.”http:
//www.transpacket.com/wp-content /uploads /2011
/06/TransPacket-C1-8-Product-sheet-r1.pdf

Table 6: I2C interface signals

The I2C bus operates at data rate of 400 kbps with two wires,

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