The research paper published by IJSER journal is about Design of Temperature Sensor Using Ring Oscillator 1

ISSN 2229-5518

Design of Temperature Sensor Using Ring

Oscillator

Shruti Suman and Prof. B.P. Singh

Abstract- This paper presents the design of a low cost temperature sensor based on ring oscillator. It exploits the frequency of the ring oscillator that is proportional to temperature which is displayed in the form of a digital output. The proposed CMOS temperature sensor comprises a ring oscillator, a voltage level shifter, a 10-bit counter, and a 10-bit register. The designed ring oscillator is frequency-tunable and the voltage level shifter provides the output to full-scale to make sure that the number of its rising edge is counted by the counter. The register saves the counted output.

Index Terms— Charge Recycling, Noise Shaping, Ring Oscillator, Temperature Sensor.

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1. INTRODUCTION

HE block diagram representation of a CMOS temperature sensor is shown in Fig. 1. Proposed ring oscillator
process will repeat indefinitely, resulting in the voltage at each node oscillating.
generates a clock signal which is proportional to the change
in temperature. A current-starved inverter with 4-digit tunable inputs makes the ring oscillator frequency-tunable. The voltage level shifter makes sure that the number of its rising edge is counted by the counter. The register saves the counter output at every positive edge of the external clock. The difference between two successive outputs of the register indicates the temperature [1][2][3].

2. EXISTING RING VCO

Counter Register

Level

Shifter

10-bit

CLOCK

A ring oscillator consists of odd number of delay stages with the output of the last stage fed back to the input of the first. To achieve oscillation, the ring must provide a phase shift of 2π and must have unity voltage gain at the frequency of oscillation. The total delay is equally divided among all stages. So each delay provides a phase shift of π /N, where N is the number of delay stages.
The remaining π phase shift is provided by a DC inversion.
The most basic ring oscillator is simply a chain of single
ended digital inverters. This circuit is shown in Fig. 2. To provide the DC inversion, an odd number of stages must be used. To see why this circuit will oscillate, assume that the output of the first inverter is a ‘0’. Therefore, the output of the Nth inverter, where N is odd, must also be ‘0’. However, this output is also the input to the first inverter, so the first inverter’s output must switch to a ‘1’. By the same logic, the output of the last inverter will eventually switch to a ‘1’, switching the output of the first inverter back to ‘0’. This

Ring

Oscillator

Fig.1. Schematic of proposed temperature sensor

To determine the frequency at which this circuit will oscillate, the delay provided by each inverter cell is . The signal must go through N inverters, each with the delay , for a total time of , to obtain the first 2 π phase shift. Then, the signal must go through each stage a second time to obtain the remaining π phase shift, resulting in a total period of . The frequency is the reciprocal of the period, resulting in the frequency as

(1)

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The research paper published by IJSER journal is about Design of Temperature Sensor Using Ring Oscillator 2

ISSN 2229-5518

FREQUENCY OF OSCILLATION OF EXISTING RING OSCILLATOR WITH RESPECT TO DC BIAS VOLTAGE

Fig 2. Existing Ring Oscillator

Fig. 2 shows the existing ring oscillator employing three delay
stages. Each inverter consists of an transistor and a . This basic structure has oscillation frequency mainly limited by the transit response of the , whose mobility is two to three times lower than its counterpart. A very simple way, namely negative skew, has been proposed [5] to improve its frequency performance. It consists of introducing a negative delay element to boost the high-to-low transition and thus to compensate devices’ performance. Tuning is possible only if auxiliary devices are added to implement a current starved inverter, which will also lead to the increase of power dissipation and phase noise.

Fig. 3 shows the waveform of an existing ring oscillator. Table I

give the frequency of oscillation for different bias voltages. To make this circuit useful, the oscillation frequency must be controllable.

Fig. 3. W aveform of Existing Ring Oscillator

TABLE I

3 .PROPOSED RING VCO

The proposed schematic 3-stage voltage controlled ring oscillator () is shown in Fig. 4. The circuit was simulated using 0.35μm technology. Both and transistors of the inverters are of the same size. The proposed oscillator (with a 3V gate voltage bias for M4) exhibits an oscillation frequency of 27.36 MHz against 10.35 kHz for the existing one. It corresponds to a considerable increase in the frequency of oscillation and the bandwidth also increases as compared to existing one. The oscillation frequency of the proposed oscillator can be tuned through gate control of M3.
The proposed Ring Oscillators in both parts are
constructed with a chain of current-starved inverter stages, while the bias current generators are of different structures. The bias current generator in the upper part provides the ring oscillator with a proper bias current to allow its oscillation period to be proportional to temperature (Fig. 4).
The input voltage is varied from 0 to 5V, in steps of
0.5V and then time period at different values of voltages from
the waveform (Fig.5) can be obtained. After that frequency is calculated by taking inverse of the time period. Table II shows values of time periods and frequencies for different values of voltages.

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The research paper published by IJSER journal is about Design of Temperature Sensor Using Ring Oscillator 3

ISSN 2229-5518

Fig.5. Output W aveform of proposed Ring

Fig. 6 shows the layout diagram of Proposed Ring VCO and

Fig. 7 shows the corresponding waveform.

Fig.4. Structure of proposed CMOS ring oscillator with current-starved inverter stages

TABLE II.

VARIATION OF FREQUENCY WITH VARIATION IN INPUT VOLTAGE OF PROPOSED RING VCO

0.0 4.990 to 5.010 59.09 28.20

A layout (a geometric representation) of the circuits is done using the previous design which is showing better performance among all designs, and simulate the design again after layout. In this way we included 2nd order effects that take place in real life and can better estimate our design performance. We do LVS (Layout versus Schematic) checks to make sure that their layout design corresponds to the same behavior as our simulated design. Basically, without layout, the design will never work properly in real life.

Fig.6. Layout Diagram of proposed ring

Fig.7. Output W aveform of proposed Ring

4. WORKING PRINCIPLE

The high-to-low and low-to-high propagation time for a



CMOS NOT gate can be expressed as;

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(1)
(2)

The research paper published by IJSER journal is about Design of Temperature Sensor Using Ring Oscillator 4

ISSN 2229-5518

and

(3)

Another feature of the proposed circuit based on the increment of as temperature increases. That is because when temperature increases, power consumption of the top circuits increases more rapidly than the bottom circuits, triggering the charge balancing action to make higher to decrease the power consumption of the top circuits and
Fig.4 shows the structure of the proposed ring
oscillator for the temperature sensor, which is composed of an odd number of current-starved inverter stages with a bias current generator. The rise and fall delays of a single inverter stage in the oscillator are determined by the inverter bias current ( ), the load capacitance , and the inverter trip voltage.



(4) (5)

Now, the oscillation frequency of the ring oscillator, composed of N current-starved inverter stages, can be represented as

(6) The Eq. (6) indicates that the oscillation frequency of

the ring oscillator is linearly dependent on the inverter bias current. Namely, if the amount of current provided by the bias current generator has a positive coefficient to temperature, the oscillation frequency will also have a positive coefficient. If the current provided by the bias current generator is constant irrespective of temperature variation, the oscillation frequency will also be temperature independent.

5. CHARGE RECYCLING

Due to the need of DC to DC converter, low supply voltage such as 0.3V for sub threshold operation is not practical when the sensor is designed as a part of a system. In addition, simply increasing the supply voltage cannot be a smart solution, because when the supply voltage is increased N times, power consumption is multiplied by . Taking into account the increased frequency of ring oscillator in accordance with the increased supply voltage, further increase in power consumption is inevitable [7]. Since there is no voltage regulator to source or sink charge from the intermediate node, is self-determined by the inherent charge balance between the top and bottom circuits [8].
increase the power consumption of the bottom circuits, finally equalizing them [9]. This property has a positive effect on the resolution, since higher leads to higher ring oscillator frequency, and in turn higher frequency-to-temperature gain of the oscillator. Also, lowest power consumption can be achieved by adjusting at the lowest target temperature to become the lowest voltage headroom for the bottom circuits through balancing the top and bottom circuits. Although it is not essential, placing a decoupling capacitor between intermediate node and ground also has a positive effect on the sensor because it stabilizes .

6. NOISE SHAPING

Since the counter is free-running without any reset signal, the current quantization noise is correlated with the previous one. As a result, just as the conventional VCO-based ADC which consists of a VCO and a counter, the proposed temperature sensor has the first-order noise shaping property [10]. In this case, the noise transfer function (NTF) is given by

(7) This Eq. (7) is high-pass whereas the signal transfer function

(STF) is all-pass. The counter output is saved in the register at
every rising edge of the clock signal. The current register
output is subtracted by the previous one and several outputs are added to produce a single value representing the temperature. The number of outputs used for adding directly affects the resolution.
Therefore, when the perfect linearity of the temperature sensor is assumed, the resolution can be expressed as

(8)

where and is the maximum and minimum temperature in the target range, respectively, and is the maximum and minimum output value before adding and N is the number of added outputs.

7. VOLTAGE LEVEL SHIFTER

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The research paper published by IJSER journal is about Design of Temperature Sensor Using Ring Oscillator 5

ISSN 2229-5518

The voltage level shifter which is used in the proposed temperature sensor circuit extends the reduced voltage level of the ring oscillator output to full-scale to make sure that the number of its rising edge is counted by the counter as shown in Fig. 8.

Fig.10. Output W aveform of voltage level shifter

Buffer circuits or level shifters for converting a signal having an input voltage level into a signal having a different predetermined voltage level are commonly used as input buffers in semiconductor devices and have been designed to interface between circuitry of two different voltage levels.

Fig.8. Circuit diagram of voltage level shifter

The level shifter in an integrated circuit translates a binary input signal having a low voltage level to a binary output signal having a different voltage level. The level shifter includes an input stage that receives the input signal (Fig. 9) and provides control signals (Fig. 10) to a low state voltage translation circuit and a high state voltage translation circuit. The low state voltage translation circuit controls the level shifter when the input signal is low and provides a bias signal to a bipolar device adapted to pull the external output signal low. The high state voltage translation circuit controls the level shifter when the input signal is high and includes a voltage reducing circuit operating as a current mirror with a pull-up transistor to couple an internal high voltage power supply to the output node ().

Fig.9. Input W aveform of voltage level shifter

Fig.11. Layout Diagram of voltage level shifter

The layout diagram of voltage level shifter is drawn using W-edit as given in Fig.11. and corresponding output waveform corresponding to the layout is given in Fig.12.

Fig.12. Output W aveform of voltage level shifter

8. COUNTERS AND REGISTER

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The research paper published by IJSER journal is about Design of Temperature Sensor Using Ring Oscillator 6

ISSN 2229-5518

The counter and register is designed using D Flip- Flop as shown in Fig. 13 and the output waveform of the corresponding D Flip-Flop is shown in Fig. 15.

Fig.13. Schematic Diagram of D Flip- Flop

Output

Input

Fig.14. Block diagram of 1-bit counter Fig.15. W aveform for D Flip-Flop

Fig.16. Schematic Diagram of Proposed Temperature Sensor

Fig.16 is the schematic view of proposed temperature sensor and Fig.17 shows the Temperature variation with respect to Oscillation Frequency.

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The research paper published by IJSER journal is about Design of Temperature Sensor Using Ring Oscillator 7

ISSN 2229-5518

Fig.17. Temperature Characteristic of Ring Oscillator showing Frequency of Oscillation Linear to Temperature

9. CONCLUSION

A low power ring oscillator-based temperature sensor has been presented. The proposed temperature sensor occupies smaller silicon area with higher resolution than the conventional temperature sensor based on band gap reference. Extremely low power consumption is achieved through charge recycling, which is to stack circuits and make each circuit to actually operate within voltage headroom, although the supply voltage is . Ring oscillator and counter in the sensor composed first-order noise shaping property just like the -based. Simple structure allowed the proposed temperature sensor to feature low power and small chip area while having high resolution. Ring oscillators are basic building blocks of complex integrated circuits. They are mainly used as clock generating circuits. The proposed has full range voltage controllability along with a wide tuning range and is most suitable for low-voltage operation due to its full range voltage controllability.

REFERENCES

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